PIC18F2585_07 Datasheet, PDF (448/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
FIGURE 27-18: MASTER SSP I²C™ BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 27-4 for load conditions.
Stop
Condition
TABLE 27-20: MASTER SSP I²C™ BUS START/STOP BITS REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
90
TSU:STA Start condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
Repeated Start condition
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
91
THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the first
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
clock pulse is generated
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
92
TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
93
THD:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
FIGURE 27-19:
SCL
SDA
In
SDA
Out
MASTER SSP I²C™ BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 27-4 for load conditions.
102
92
110
DS39625C-page 446
Preliminary
© 2007 Microchip Technology Inc.