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PIC18F2585_07 Datasheet, PDF (229/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PIC18F2585/2680/4585/4680
18.0 ENHANCED UNIVERSAL
SYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial
Communications Interface or SCI.) The USART can be
configured as a full-duplex asynchronous system that
can communicate with peripheral devices, such as
CRT terminals and personal computers. It can also be
configured as a half-duplex synchronous system that
can communicate with peripheral devices, such as A/D
or D/A integrated circuits, serial EEPROMs and so on.
The EUSART module implements additional features,
including automatic baud rate detection and calibra-
tion, automatic wake-up on Sync Break reception and
12-bit Break character transmit. These make it ideally
suited for use in Local Interconnect Network bus (LIN
bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full-duplex) with:
- Auto-Wake-up on character reception
- Auto-Baud calibration
- 12-bit Break character transmission
• Synchronous – Master (half-duplex) with
selectable clock polarity
• Synchronous – Slave (half-duplex) with selectable
clock polarity
The pins of the Enhanced USART are multiplexed with
PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT as a USART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for
Asynchronous and Synchronous Master modes,
or set (= 1) for Synchronous Slave mode
Note:
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register 18-1, Register 18-2 and Register 18-3,
respectively.
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 227