PIC18F4539 Datasheet, PDF (81/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
REGISTER 8-9:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
U-0
U-0
U-0
R/W-1 R/W-1 R/W-1 R/W-1
—
—
—
EEIP⁽¹⁾ BCLIP⁽¹⁾ LVDIP⁽¹⁾ TMR3IP⁽¹⁾
bit 7
U-1
—
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
EEIP⁽¹⁾: Data EEPROM/FLASH Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
BCLIP⁽¹⁾: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
LVDIP⁽¹⁾: Low Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP⁽¹⁾: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘1’
Note 1: Maintain this bit cleared (= 0).
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2002 Microchip Technology Inc.
Preliminary
DS30485A-page 79