PIC18F4539 Datasheet, PDF (279/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
FIGURE 23-13: EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
SS
81
SCK
(CKP = 0)
71
72
79
73
SCK
(CKP = 1)
80
78
SDO
MSb
bit6 - - - - - -1
75, 76
SDI
MSb In
bit6 - - - -1
74
Note: Refer to Figure 23-4 for load conditions.
LSb
LSb In
TABLE 23-12: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
Param.
No.
Symbol
Characteristic
Min
Max Units Conditions
71
TscH
71A
SCK input high time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
72
TscL
72A
SCK input low time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
73
TdiV2scH, Setup time of SDI data input to SCK edge
TdiV2scL
100
—
73A TB2B
Last clock edge of Byte 1 to the 1st clock edge of Byte 2 1.5 TCY + 40 —
74
TscH2diL, Hold time of SDI data input to SCK edge
TscL2diL
100
—
75
TdoR
SDO data output rise time
PIC18FXXXX
—
25
PIC18LFXXXX
—
60
76
TdoF
SDO data output fall time
PIC18FXXXX
—
25
PIC18LFXXXX
—
60
78
TscR
SCK output rise time (Master mode) PIC18FXXXX
—
25
PIC18LFXXXX
—
60
79
TscF
SCK output fall time (Master mode) PIC18FXXXX
—
25
PIC18LFXXXX
—
60
80
TscH2doV, SDO data output valid after SCK PIC18FXXXX
—
50
TscL2doV edge
PIC18LFXXXX
—
150
81
TdoV2scH, SDO data output setup to SCK edge
TdoV2scL
TCY
—
Note 1: Requires the use of Parameter # 73A.
2: Only if Parameter # 71A and # 72A are used.
ns
ns (Note 1)
ns
ns (Note 1)
ns
ns (Note 2)
ns
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
 2002 Microchip Technology Inc.
Preliminary
DS30485A-page 277