PIC18F4539 Datasheet, PDF (136/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
16.4 I²C Mode
The MSSP module in I²C mode fully implements all
master and slave functions (including general call sup-
port) and provides interrupts on START and STOP bits
in hardware to determine a free bus (multi-master func-
tion). The MSSP module implements the Standard
mode specifications, as well as 7-bit and 10-bit
addressing.
Two pins are used for data transfer:
• Serial clock (SCL) - RC3/SCK/SCL
• Serial data (SDA) - RC4/SDI/SDA
The user must configure these pins as inputs or outputs
through the TRISC<4:3> bits.
FIGURE 16-7:
MSSP BLOCK DIAGRAM
(I²C MODE)
Read
Internal
Data Bus
Write
RC3/SCK/SCL
RC4/
SDI/
SDA
SSPBUF reg
Shift
Clock
SSPSR reg
MSb
LSb
Match Detect
Addr Match
SSPADD reg
START and
STOP bit Detect
Set, Reset
S, P bits
(SSPSTAT reg)
16.4.1 REGISTERS
The MSSP module has six registers for I²C operation.
These are:
• MSSP Control Register1 (SSPCON1)
• MSSP Control Register2 (SSPCON2)
• MSSP Status Register (SSPSTAT)
• Serial Receive/Transmit Buffer (SSPBUF)
• MSSP Shift Register (SSPSR) - Not directly
accessible
• MSSP Address Register (SSPADD)
SSPCON, SSPCON2 and SSPSTAT are the control
and status registers in I²C mode operation. The
SSPCON and SSPCON2 registers are readable and
writable. The lower 6 bits of the SSPSTAT are read
only. The upper two bits of the SSPSTAT are
read/write.
SSPSR is the shift register used for shifting data in or
out. SSPBUF is the buffer register to which data bytes
are written to or read from.
SSPADD register holds the slave device address
when the SSP is configured in I²C Slave mode. When
the SSP is configured in Master mode, the lower
seven bits of SSPADD act as the baud rate generator
reload value.
In receive operations, SSPSR and SSPBUF together,
create a double-buffered receiver. When SSPSR
receives a complete byte, it is transferred to SSPBUF
and the SSPIF interrupt is set.
During transmission, the SSPBUF is not double-
buffered. A write to SSPBUF will write to both SSPBUF
and SSPSR.
DS30485A-page 134
Preliminary
 2002 Microchip Technology Inc.