PIC18F4539 Datasheet, PDF (224/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
BNOV
Branch if Not Overflow
Syntax:
[ label ] BNOV n
Operands:
-128 ≤ n ≤ 127
Operation:
if overflow bit is ‘0’
(PC) + 2 + 2n → PC
Status Affected: None
Encoding:
1110 0101 nnnn nnnn
Description:
If the Overflow bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Decode
Read literal
'n'
No
operation
No
operation
Q3
Process
Data
No
operation
Q4
Write to PC
No
operation
If No Jump:
Q1
Decode
Q2
Read literal
'n'
Q3
Process
Data
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Overflow =
PC
=
If Overflow =
PC
=
BNOV Jump
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
BNZ
Branch if Not Zero
Syntax:
[ label ] BNZ n
Operands:
-128 ≤ n ≤ 127
Operation:
if zero bit is ‘0’
(PC) + 2 + 2n → PC
Status Affected: None
Encoding:
1110 0001 nnnn nnnn
Description:
If the Zero bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Decode
Read literal
'n'
No
operation
No
operation
Q3
Process
Data
No
operation
Q4
Write to PC
No
operation
If No Jump:
Q1
Decode
Q2
Read literal
'n'
Q3
Process
Data
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Zero
=
PC
=
If Zero
=
PC
=
BNZ Jump
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
DS30485A-page 222
Preliminary
 2002 Microchip Technology Inc.