PIC18F4539 Datasheet, PDF (277/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
FIGURE 23-11:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F4X39)
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 23-4 for load conditions.
62
63
TABLE 23-10: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4X39)
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data in valid before WR↑ or CS↑
(setup time)
20 — ns
25 — ns Extended Temp. Range
63
TwrH2dtI WR↑ or CS↑ to data–in invalid PIC18FXXXX 20 — ns
(hold time)
PIC18LFXXXX 35 — ns VDD = 2V
64
TrdL2dtV RD↓ and CS↓ to data–out valid
— 80 ns
— 90 ns Extended Temp. Range
65
TrdH2dtI RD↑ or CS↓ to data–out invalid
10 30 ns
66
TibfINH Inhibit of the IBF flag bit being cleared from
WR↑ or CS↑
— 3 TCY
 2002 Microchip Technology Inc.
Preliminary
DS30485A-page 275