243658-020 Datasheet, PDF (93/128 Pages) Intel Corporation – Intel Celeron Processor up to 1.10 GHz

Intel^® Celeron^® Processor up to 1.10 GHz
Table 51. Package Dimensions (FC-PGA Package)
Millimeters
Inches
Symbol
A1
A2
B1
B2
C1
C2
D
D1
G1
G2
G3
H
L
ϕP
Pin TP
Min
Max
Notes
0.787
0.889
1.000
1.200
11.183
11.285
9.225
9.327
23.495 max
21.590 max
49.428
49.632
45.466
45.947
0.000
17.780 1
0.000
17.780 1
0.000
0.889 1
2.540
Nominal
3.048
3.302
0.431
0.483
0.508 Diametric True Position (Pin-to-Pin)
Min
Max
Notes
0.031
0.035
0.039
0.047
0.440
0.445
0.363
0.368
0.925 max
0.850 max
1.946
1.954
1.790
1.810
0.000
0.700
0.000
0.700
0.000
0.035
0.100
Nominal
0.120
0.130
0.017
0.019
0.020 Diametric True Position (Pin-to-Pin)
NOTES:
1. Capacitors and resistors may be placed on the pin-side of the FC-PGA package in the area defined by G1,
G2, and G3. This area is a keepout zone for motherboard designers.
The bare processor die has mechanical load limits that should not be exceeded during heatsink
assembly, mechanical stress testing, or standard drop and shipping conditions. The heatsink attach
solution must not induce permanent stress into the processor substrate with the exception of a
uniform load to maintain the heatsink to the processor thermal interface. The package dynamic and
static loading parameters are listed in Table 52.
For Table 52, the following apply:
1. It is not recommended to use any portion of the processor substrate as a mechanical reference
or load bearing surface for thermal solutions.
2. Parameters assume uniformly applied loads
Table 52. Processor Die Loading Parameters (FC-PGA Package)
Parameter
Dynamic (max)¹ Static (max)²
Unit
Silicon Die Surface
Silicon Die Edge
200
50
lbf
100
12
lbf
NOTES:
1. This specification applies to a uniform and a non-uniform load.
2. This is the maximum static force that can be applied by the heatsink and clip to maintain the heatsink and
processor interface.
Datasheet
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