243658-020 Datasheet, PDF (85/128 Pages) Intel Corporation – Intel Celeron Processor up to 1.10 GHz

Intel^® Celeron^® Processor up to 1.10 GHz
Table 49. PPGA Package Signal Listing
by Pin Number
Pin
No.
Pin Name
Signal Buffer Type
E5
VCCCORE
E7
VSS
E9
VCCCORE
E11
VSS
E13
E15
VCCCORE
VSS
E17
E19
VCCCORE
VSS
E21
VCOREDET
E23 Reserved
E25 D62#
E27 Reserved
E29 Reserved
E31 Reserved
E33
VREF0
E35 BPM1#
E37 BP3#
F2
VCCCORE
F4
VCCCORE
F6
D32#
F8
D22#
F10
Reserved
F12
D27#
F14
VCCCORE
F16
D63#
F18
VREF1
F20
VSS
F22
VCCCORE
F24
VSS
F26
VCCCORE
F28
VSS
F30
VCCCORE
F32
VSS
F34
VCCCORE
F36
VSS
G1
D21#
G3
D23#
G5
VSS
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Reserved for Future Use
Power/Other
Reserved for Future Use
Reserved for Future Use
Reserved for Future Use
Power/Other
AGTL+ I/O
AGTL+ I/O
Power/Other
Power/Other
AGTL+ I/O
AGTL+ I/O
Reserved for Future Use
AGTL+ I/O
Power/Other
AGTL+ I/O
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
AGTL+ I/O
AGTL+ I/O
Power/Other
Table 49. PPGA Package Signal Listing
by Pin Number
Pin
No.
Pin Name
Signal Buffer Type
G33 BP2#
AGTL+ I/O
G35 Reserved
Reserved for Future Use
G37 Reserved
Reserved for Future Use
H2
VSS
Power/Other
H4
D16#
AGTL+ I/O
H6
D19#
AGTL+ I/O
H32
H34
VCCCORE
VSS
Power/Other
Power/Other
H36
J1
VCCCORE
D7#
Power/Other
AGTL+ I/O
J3
D30#
AGTL+ I/O
J5
VCCCORE
J33
PICCLK
Power/Other
APIC Clock Input
J35
PICD0
APIC I/O
J37
PREQ#
CMOS Input
K2
VCCCORE
Power/Other
K4
VREF2
Power/Other
K6
D24#
AGTL+ I/O
K32
K34
K36
VCCCORE
VCCCORE
VSS
Power/Other
Power/Other
Power/Other
L1
D13#
AGTL+ I/O
L3
D20#
AGTL+ I/O
L5
VSS
Power/Other
L33
Reserved
Reserved for Future Use
L35
PICD1
APIC I/O
L37
LINT1/NMI
CMOS Input
M2
VSS
Power/Other
M4
D11#
AGTL+ I/O
M6
D3#
AGTL+ I/O
M32
M34
M36
N1
N3
N5
N33
N35
VCCCORE
VSS
LINT0/INTR
D2#
D14#
VCCCORE
Reserved
Reserved
Power/Other
Power/Other
CMOS Input
AGTL+ I/O
AGTL+ I/O
Power/Other
Reserved for Future Use
Reserved for Future Use
Datasheet
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