243658-020 Datasheet, PDF (57/128 Pages) Intel Corporation – Intel Celeron Processor up to 1.10 GHz

Intel^® Celeron^® Processor up to 1.10 GHz
3.3
Non-AGTL+ Signal Quality Specifications and Measurement
Guidelines
There are three signal quality parameters defined for non-AGTL+ signals: overshoot/undershoot,
ringback, and settling limit. All three signal quality parameters are shown in Figure 14 for the non-
AGTL+ signal group.
Figure 14. Non-AGTL+ Overshoot/Undershoot, Settling Limit, and Ringback
Overshoot
V_HI
Settling Limit
Rising-Edge
Ringback
Settling Limit
Falling-Edge
Ringback
V_LO
3.3.1
V_SS
Time
Undershoot
NOTES:
1. For the FC-PGA/FC-PGA2 packages, V_HI = 1.5 V for all non-AGTL+ signals except for BCLK, PICCLK, and
PWRGOOD. V_HI = 2.5 V for BCLK, PICCLK, and PWRGOOD. BCLK and PICCLK signal quality is detailed in
Section 3.1.
Overshoot/Undershoot Guidelines
Overshoot (or undershoot) is the absolute value of the maximum voltage above the nominal high
voltage or below VSS. The overshoot/undershoot guideline limits transitions beyond VCC or VSS
due to the fast signal edge rates. (See Figure 14 for non-AGTL+ signals.) The processor can be
damaged by repeated overshoot events on the voltage tolerant buffers if the charge is large enough
(i.e., if the overshoot is great enough). The PPGA and S.E.P. packages have 2.5 V tolerant buffers
and the FC-PGA/FC-PGA2 packages has 1.5 V or 2.5 V tolerant buffers.
However, excessive ringback is the dominant detrimental system timing effect resulting from
overshoot/undershoot (i.e., violating the overshoot/undershoot guideline will make satisfying the
ringback specification difficult). The overshoot/undershoot guideline is 0.7 V for the PPGA
and S.E.P. packages and 0.3 V for the FC-PGA/FC-PGA2 packages and assumes the absence
of diodes on the input. These guidelines should be verified in simulations without the on-chip
ESD protection diodes present because the diodes will begin clamping the signals (2.5 V tolerant
signals for the S.E.P. and PPGA packages, and 2.5 V or 1.5 V tolerant signals for the FC-PGA/
FC-PGA2 packages) beginning at approximately 0.7 V above the appropriate supply and 0.7 V
below VSS. If signals are not reaching the clamping voltage, this will not be an issue. A system
should not rely on the diodes for overshoot/undershoot protection as this will negatively affect the
life of the components and make meeting the ringback specification very difficult.
Datasheet
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