243658-020 Datasheet, PDF (7/128 Pages) Intel Corporation – Intel Celeron Processor up to 1.10 GHz

Intel^® Celeron^® Processor up to 1.10 GHz
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Processor Identification .......................................................................................13
Voltage Identification Definition ...........................................................................20
Intel^® Celeron^® Processor System Bus Signal Groups.......................................22
Absolute Maximum Ratings................................................................................24
Voltage and Current Specifications .....................................................................25
AGTL+ Signal Groups DC Specifications............................................................31
Non-AGTL+ Signal Group DC Specifications......................................................32
Processor AGTL+ Bus Specifications .................................................................33
System Bus AC Specifications (Clock) at the Processor Edge Fingers
(for S.E.P. Package)............................................................................................35
System Bus AC Specifications (Clock) at the Processor
Core Pins (for Both S.E.P. and PGA Packages) .................................................36
System Bus AC Specifications (SET Clock)........................................................37
Valid Intel^® Celeron^® Processor System Bus, Core Frequency..........................38
System Bus AC Specifications (AGTL+ Signal Group) at the Processor
Edge Fingers (for S.E.P. Package) .....................................................................39
System Bus AC Specifications (AGTL+ Signal Group) at the Processor
Core Pins (for S.E.P. Package)...........................................................................39
Processor System Bus AC Specifications (AGTL+ Signal Group) at the
Processor Core Pins (for PPGA Package)..........................................................40
System Bus AC Specifications (AGTL+ Signal Group) at the Processor
Core Pins (for FC-PGA/FC-PGA2 Packages) .....................................................40
System Bus AC Specifications (CMOS Signal Group) at the Processor
Edge Fingers (for S.E.P. Package) .....................................................................41
System Bus AC Specifications (CMOS Signal Group) at the Processor
Core Pins (for Both S.E.P., PGA, and FC-PGA/FC-PGA2 Packages)................41
System Bus AC Specifications (CMOS Signal Group) .......................................42
System Bus AC Specifications (Reset Conditions)
(for Both S.E.P. and PPGA Packages) ...............................................................42
System Bus AC Specifications (Reset Conditions) (for the
FC-PGA/FC-PGA2 Packages) ............................................................................42
System Bus AC Specifications (APIC Clock and APIC I/O) at the
Processor Edge Fingers (for S.E.P. Package) ....................................................43
System Bus AC Specifications (APIC Clock and APIC I/O) at the
Processor Core Pins (For S.E.P. and PGA Packages) .......................................44
System Bus AC Specifications (APIC Clock and APIC I/O) ................................45
System Bus AC Specifications (TAP Connection) at the Processor
Edge Fingers (For S.E.P. Package) ....................................................................45
System Bus AC Specifications (TAP Connection) at the Processor
Core Pins (for Both S.E.P. and PPGA Packages)...............................................46
System Bus AC Specifications (TAP Connection) ..............................................47
BCLK Signal Quality Specifications for Simulation at the Processor Core
(for Both S.E.P. and PPGA Packages) ...............................................................52
BCLK/PICCLK Signal Quality Specifications for Simulation at the
Processor Pins (for the FC-PGA/FC-PGA2 Packages).......................................53
BCLK Signal Quality Guidelines for Edge Finger Measurement
(for the S.E.P. Package)......................................................................................54
AGTL+ Signal Groups Ringback Tolerance Specifications at the
Processor Core (For Both the S.E.P. and PPGA Packages) ..............................55
Datasheet
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