82551QM Datasheet, PDF (90/120 Pages) Intel Corporation – Fast Ethernet Multifunction PCI/CardBus Controller

82551QM — Networking Silicon
Table 50. Register 17: PHY Unit Special Control
Bit(s)
Name
Description
12
Force 34
1 = Force 34 transmit pattern
Transmit Pattern _{0 = Normal operation}
11
Good Link
1 = 100BASE-TX link good
0 = Normal operation
10
Reserved
This bit is reserved and should be set to 0b.
9
Transmit Carrier 1 = Transmit Carrier Sense disabled
Sense Disable
0 = Transmit Carrier Sense enabled
8
Disable Dynamic 1 = Dynamic Power-Down disabled
Power-Down
0 = Dynamic Power-Down enabled (normal)
7
Auto-Negotiation 1 = Auto-Negotiation loopback
Loopback
0 = Auto-Negotiation normal mode
6
MDI Tri-State
1 = MDI Tri-state (transmit driver tri-states)
0 = Normal operation
5
Filter By-pass
1 = By-pass filter
0 = Normal filter operation
4
Auto Polarity
1 = Auto Polarity disabled
Disable
0 = Normal polarity operation
3
Squelch Disable 1 = 10BASE-T squelch test disable
0 = Normal squelch operation
2
Extended
Squelch
1 = 10BASE-T Extended Squelch control enabled
0 = 10BASE-T Extended Squelch control disabled
1
Link Integrity
1 = Link disabled
Disable
0 = Normal Link Integrity operation
0
Jabber Function 1 = Jabber disabled
Disable
0 = Normal Jabber operation
Default
0
R/W
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
11.3.3
Register 18: PHY Address Register
Table 51. Register 18: PHY Address
Bit(s)
Name
Description
15:5 Reserved
4:0
PHY Address
These bits are reserved and should be set to a
constant ‘0’
These bits are set to the PHY’s address, 00001b.
Default
0
R/W
RO
1
RO
11.3.4
Register 19: 100BASE-TX Receive False Carrier Counter
Table 52. Register 19: 100BASE-TX Receive False Carrier Counter
Bit(s)
Name
Description
15:0 Receive False
Carrier
These bits are used for the false carrier counter.
Default
--
R/W
RO
SC
84
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