82551QM Datasheet, PDF(75/120 Page) Intel Corporation – Fast Ethernet Multifunction PCI/CardBus Controller

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82551QM Datasheet, PDF (75/120 Pages) Intel Corporation – Fast Ethernet Multifunction PCI/CardBus Controller

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Networking Silicon â 82551QM

10.1.10 Power Management Driver Register

The 82551QM provides an indication in memory and I/O space that a wake-up event has occurred.

It is located in the Power Management Driver (PMDR). The PMDR is used for CardBus mode

only.

Table 30. Power Management Driver Register

Bits

Default

Read/Write

Description

Read/Clear

Link Status Change Indication. The link status change bit is set

following a change in link status and is cleared by writing a 1b to it.

Magic Packet*. This bit is set when a Magic Packet is received

regardless of the Magic Packet wake-up disable bit in the configuration

command and the PME Enable bit in the Power Management Control/

Status Register. This bit is cleared by writing 1b to it.

Read/Clear

Read Only

Interesting Packet. This bit is set when an âinterestingâ packet is

received. Interesting packets are defined by the 82551QM packet

filters. This bit is cleared by writing 1b to it.

Reserved. This bit is reserved and should be set to 0b.

Read Only

GCL Enable. This bit is set to 1b when the 82551QM is in GCL mode

(in other words, the 82551QM handles management packets). If the

GCL Enable bit is set to 0b, the 82551QM does not handle

management packets. In this mode, management packets are handled

by an external TCO controller.

Read/Clear

Force TCO Indication. This bit is reserved for testing.

TCO Request. This bit is set to 1b when the 82551QM is busy with

TCO activity.

Read/Clear

PME Status. This bit is a reflection of the PME Status bit in the Power

Management Control/Status Register (PMCSR). It is set upon a wake-

up event and is independent of the PME Enable bit.

This bit is cleared by writing 1b to it. This also clears the PME Status

bit in the PMCSR and de-asserts the PME signal. In a CardBus

system, if 1b is written to this field, the General Wake-up (GWAKE) bit

in the Function Event register is cleared.

Datasheet

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