82551QM Datasheet, PDF (89/120 Pages) Intel Corporation – Fast Ethernet Multifunction PCI/CardBus Controller

Networking Silicon — 82551QM
11.3
MDI Register 16 - 31
11.3.1
Register 16: PHY Unit Status and Control Register
Table 49. PHY Unit Status and Control
Bit(s)
Name
Description
15:14 Reserved
These bits are reserved and should be set to 00b
13
Carrier Sense
This bit enables the disconnect function.
Disconnect
Control
1 = Disconnect function enabled
0 = Disconnect function disabled
12
Transmit Flow
This bit enables Transmit Flow Control
Control Disable _{1 = Transmit Flow Control enabled}
0 = Transmit Flow Control disabled
11
Receive De-
This bit indicates receipt status of the 100BASE-TX
Serializer In-Sync receive de-serializer in-sync.
Indication
10
100BASE-TX
This bit indicates the power state of 100BASE-TX
Power-Down
PHY unit.
1 = Power-Down
0 = Normal operation
9
10BASE-T
This bit indicates the power state of 100BASE-TX
Power-Down
PHY unit.
1 = Power-Down
0 = Normal operation
8
Polarity
7:2
Reserved
This bit indicates 10BASE-T polarity.
1 = Reverse polarity
0 = Normal polarity
These bits are reserved and should be set to 0B.
1
Speed
This bit indicates the Auto-Negotiation result.
1 = 100 Mbps
0 = 10 Mbps
0
Duplex Mode
This bit indicates the Auto-Negotiation result.
1 = Full Duplex
0 = Half Duplex
Default
00
0
R/W
RW
RW
0
RW
--
RO
1
RO
1
RO
--
RO
000000 RO
--
RO
--
RO
11.3.2
Register 17: PHY Unit Special Control Register
Table 50. Register 17: PHY Unit Special Control
Bit(s)
Name
Description
15
Scrambler By-
1 = By-pass Scrambler
pass
0 = Normal operations
14
By-pass 4B/5B 1 = 4 bit to 5 bit by-pass
0 = Normal operation
13
Force Transmit H- 1 = Force transmit H-pattern
Pattern
0 = Normal operation
Default
0
R/W
RW
0
RW
0
RW
Datasheet
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