82551QM Datasheet, PDF (107/120 Pages) Intel Corporation – Fast Ethernet Multifunction PCI/CardBus Controller

Networking Silicon — 82551QM
12.4.2.5 PHY Timings
Table 80. 10BASE-T Normal Link Pulse (NLP) Timing Parameters
Symbol
Parameter
T56
T57
T_{nlp_wid}
T_{nlp_per}
NLP Width
NLP Period
Condition Min Typ
10 Mbps
10 Mbps
100
8
Max Units
ns
24 ms
Figure 29. 10BASE-T Normal Link Pulse (NLP) Timings
T57
T56
Normal Link Pulse
Table 81. Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters
Symbol
Parameter
T58 T_{flp_wid}
FLP Width (clock/data)
T59 T_{flp_clk_clk} Clock Pulse to Clock Pulse Period
T60 T_{flp_clk_dat} Clock Pulse to Data Pulse Period
T61 T_{flp_bur_num} Number of Pulses in one burst
T62 T_{flp_bur_wid} FLP Burst Width
T63 T_{flp_bur_per} FLP Burst Period
Min Typ Max Units
100
ns
111 125 139 µs
55.5 62.5 69.5 µs
17
33
2
ms
8
24 ms
Figure 30. Auto-Negotiation Fast Link Pulse (FLP) Timings
Fast Link Pulse
FLP Bursts
T60
T58
Clock Pulse
T63
T62
T59
Data Pulse
Clock Pulse
Datasheet
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