82845G Datasheet, PDF (76/193 Pages) Intel Corporation – Intel 82845G/82845GL/82845GV Graphics and Memory Controller Hub (GMCH)

Register Description
3.5.1.35
SMICMD—SMI Command Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
CC–CDh
0000h
RO, R/W
16 bits
This register enables various errors to generate a SMI message via the hub interface.
3.5.1.36
Bit
15:0 Intel Reserved.
Description
SCICMD—SCI Command Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
CE–CDh
0000h
RO, R/W
16 bits
This register enables various errors to generate a SMI message via the hub interface.
3.5.1.37
Bit
15:0 Intel Reserved.
Description
SKPD—Scratchpad Data Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
DEh
0000h
R/W
16 bits
Bit
15:0
Description
Scratchpad (SCRTCH). These bits are simply R/W storage bits that have no effect on the GMCH
functionality.
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Intel^® 82845G/82845GL/82845GV GMCH Datasheet