82845G Datasheet, PDF (71/193 Pages) Intel Corporation – Intel 82845G/82845GL/82845GV Graphics and Memory Controller Hub (GMCH)

Register Description
3.5.1.28
APSIZE—Aperture Size Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
B4h
00h
RO, R/W
8 bits
This register determines the effective size of the Graphics Aperture used for a particular GMCH
configuration. This register can be updated by the GMCH-specific BIOS configuration sequence
before the PCI standard bus enumeration sequence takes place. If the register is not updated then a
default value will select an aperture of maximum size (i.e., 256 MB). The size of the table that will
correspond to a 256-MB aperture is not practical for most applications and therefore these bits
must be programmed to a smaller practical value that will force adequate address range to be
requested via APBASE register from the PCI configuration software.
3.5.1.29
Bit
Description
7:6 Reserved.
Graphics Aperture Size (APSIZE. Each bit in APSIZE[5:0] operates on similarly ordered bits in
APBASE[27:22] of the Aperture Base configuration register. When a particular bit of this field is 0 it
forces the similarly ordered bit in APBASE[27:22] to behave as hardwired to 0. When a particular bit
of this field is set to 1 it allows corresponding bit of the APBASE[27:22] to be read/write accessible.
Default The default value (APSIZE[5:0]=000000b) forces the default APBASE[27:22] to read as
000000b (i.e. all bits respond as hardwired to 0). This provides the maximum aperture size of
256 MB. As another example, programming APSIZE[5:0] to 111000b hardwires APBASE[24:22] to
000b and enables APBASE[27:25] to be read/write programmable.
5:0 _{000000 = 256-MB Aperture Size}
100000 = 128-MB Aperture Size
110000 = 64-MB Aperture Size
111000 = 32-MB Aperture Size
111100 = 16-MB Aperture Size
111110 = 8-MB Aperture Size
111111 = 4-MB Aperture Size
ATTBASE—Aperture Translation Table Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
B8–BBh
00000000h
Read Only, Read/Write
32 bits
This register provides the starting address of the Graphics Aperture Translation Table Base located
in the main SDRAM. This value is used by the GMCH’s Graphics Aperture address translation
logic (including the GTLB logic) to obtain the appropriate address translation entry required during
the translation of the aperture address into a corresponding physical SDRAM address. The
ATTBASE register may be dynamically changed.
Bit
31:12
11:0
Description
Aperture Translation Table Base (TTABLE). This field contains a pointer to the base of the
translation table used to map memory space addresses in the aperture range to addresses in main
memory.
NOTE: This field should be modified only when the GTLB has been disabled.
Reserved.
Intel^® 82845G/82845GL/82845GV GMCH Datasheet
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