82845G Datasheet, PDF (13/193 Pages) Intel Corporation – Intel 82845G/82845GL/82845GV Graphics and Memory Controller Hub (GMCH)

Introduction
Introduction
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1.1
This Graphics and Memory Controller Hub (GMCH) datasheet is for the Intel^® 82845G GMCH,
Intel^® 82845GL GMCH, and Intel^® 82845GV GMCH. The 82845G GMCH is part of the Intel^®
845G chipset, the 82845GL GMCH is part of the Intel^® 845GL chipset, and the 82845GV GMCH
is part of the Intel^® 845GV chipset. Each chipset contains two main components: Graphics and
Memory Controller Hub (GMCH) for the host bridge and I/O Controller Hub for the I/O
subsystem. The GMCH provides the processor interface, system memory interface, hub interface,
and additional interfaces in an 845G / 845GL / 845GV chipset desktop platform. Each GMCH
contains an integrated graphics controller (IGD). The 845G chipset, 845GL chipset, and 845GV
chipset use the 82801DB ICH4 for the I/O Controller Hub.
The following are the key feature differences between the 82845G GMCH, 82845GL GMCH, and
82845GV GMCH:
• Processor System Bus (PSB) frequency
— 82845G and 82845GV support 533 MHz/400 MHz frequencies and Hyper-Threading
Technology.
— 82845GL supports 400 MHz only and does not support Hyper-Threading Technology.
• AGP Interface
— 82845G supports AGP. The AGP interface signals are multiplexed with the Intel^® DVO
interface signals.
— 82845GL and 82845GV do not support AGP.
Chapter 1 through Chapter 8 describe the 82845G GMCH. The 82845GL GMCH and 82845GV
GMCH are described in Chapter 9.
Terminology
Term
Accelerated
Graphics Port
(AGP)
AGP/PCI
Chipset Core
DDR
Full Reset
GART
GMCH
Description
This refers to the AGP/PCI_B interface on the GMCH. The GMCH AGP interface
supports only 1.5 V Accelerated Graphics Port Interface, Specification 2.0-compliant
devices using PCI (66 MHz), AGP 1X (66 MHz), 2X (133 MT/s) and 4X (266 MT/s)
transfers. The GMCH does NOT support 3.3 V devices. PIPE# and SBA addressing
cycles and their associated data phases are generally referred to as AGP transactions.
FRAME# cycles are generally referred to as AGP/PCI transactions.
AGP/PCI in the document refers to AGP/PCI_B.
The GMCH internal base logic.
Double Data Rate SDRAM.
A Full GMCH Reset is defined in this document when RSTIN# is asserted.
Graphics Aperture Re-Map Table. Table in memory containing the page re-map
information used during AGP aperture address translations.
The Graphics and Memory Controller Hub (GMCH) component contains the processor
interface, SDRAM controller, AGP interface, and an integrated 3D/2D/display graphics
core. It communicates with the I/O Controller Hub 4 (ICH4) over a proprietary interconnect
called the hub interface.
Intel^® 82845G/82845GL/82845GV GMCH Datasheet
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