MB86967 Datasheet, PDF (42/129 Pages) Fujitsu Component Limited. – LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces

MB86967
(5) DLCR4: Transmit Mode Register
DLCR4 sets the transmitter operation modes, and displays the count of collision occurrence.
Read
Write
Initial Value
Bit 7
COL3
—
0*
Bit 6
COL2
—
0*
Bit 5
COL1
—
0*
Bit 4
COL0
—
0*
Bit 3
TST1
0
0
Bit 2
CNTRL
1
Bit 1
LBC
1
Bit 0
DSC
0
Bit no. Bit name
7 to 4 COL3 to COL0
(Collision
Count)
3 TST1
(Chip Test 1)
Operation
Read
Read/Write
2 CNTRL
Read/Write
(DREQ Control)
1 LBC
(Loopback
Control)
Read/Write
0 DSC
Read/Write
(Disable
Carrier Detec)
Value
—
—
0
1
0
1
—
Function
Displays count of collision until transmission completed.
These bits are cleared at the completion of transmission.
This is a chip test bit. Always write 0 to this bit at writing to
DLCR4. 1 cannot be written to this bit during normal
operation.
The DREQ signal is negated in the
last cycle of DMA transfer.
* : This bit is invalid in the
The DREQ signal is negated two
PC card mode.
cycles before the last cycle of DMA
transfer.
Forced to enter loopback mode.
The loopback is not canceled even when a collision is
detected. Transmit data is not output from the TPOP*/TPON*
pin.
Enters standard loopback mode specified in 10BASE-T
standard.
The loopback function works only at data transmission. The
transmit data is loopbacked to the receiver by the encoder/
decoder.
If the MB86967 is in the link fail and jabber states when a
collision is detected, the loopback mode is canceled and
signals are accepted from the twisted-pair board.
When this bit is set to 1, the MB86967 is enabled for duplex
transmission. In this case, data can be transmitted
irrespective of the state of the receiver, enabling external
loopback operation.
* : These bits are undefined until the first packet is completely transmitted after power-on.
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