MB86967 Datasheet, PDF (101/129 Pages) Fujitsu Component Limited. – LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces

MB86967
(13)General-purpose Bus Mode Read Cycle
(VDD = +5 V ± 5%, GND = 0 V, Ta = 0°C to +70°C)
Parameter
Value
Symbol
Unit
Min.
Typ.
Max.
Address setup time (from IOR assert)
Address hold time (from IOR negate)
IOR pulse width
t1
3
—
—
ns
t2
3
—
—
ns
t3
30
—
—
ns
Output delay time for READY negate
t4
7*²
—
26*²
ns
Output delay time for READY assert
t5
—
—
175*¹
ns
Output delay time for READY assert
t6
—
—
28/175*³
ns
Output delay time for READY negate
t7
—
—
28
ns
Output delay time for read data (from IOR assert)
t8
—
—
44
ns
Output delay time for read data (from READY assert)
t9
—
—
8
ns
Output delay time for read data (from READY assert)
t10
—
—
18
ns
Output hold time for read data
t11
10
—
80
ns
*1: READY is negated only when the read access is conflicted with that of the network on reading the buffer memory
port (BMR8).
This value would be 2.15 µs when the bus read error occurs on reading the buffer memory port.
*2: READY is negated only when the read access is conflicted with that of the network on reading the buffer memory
port (BMR8).
*3: Max time is 28 ns for normal read. Max time is 175 ns only when the read access is conflicted with that of the
network on reading the buffer memory port (BMR8).
This value would be 2.15 µs when the bus read error occurs on reading the buffer memory port.
101