MB86967 Datasheet, PDF (107/129 Pages) Fujitsu Component Limited. – LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces

MB86967
• Burst DMA access timing (When DMA is exited with the EOP input)
DREQ
DMACK
IOR, IOW
EOP^*
EOP^*
t3
t2
t4
* : EOP input allows the values of EOP/EOP register values for bit 1 of DLCR7 to toggle between EOP (active high) and
EOP (active low).
Note: IOCHRDY signal timing is identical as that of bus timing.
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