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MB86967 Datasheet, PDF (28/129 Pages) Fujitsu Component Limited. – LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces
MB86967
Table 2 Receive Packet Header Status Indications
Condition
N/A
(Bit 7)
GOOD PACKET
0
PACKET WITH
ERROR
0
N/A
(Bit 6)
0
0
Good
PKT
(Bit 5)
1
0
RMT
0900H
(Bit 4)
0/1
0/1
SHORT
PKT ERR
(Bit 3)
X
0/1
ALIGN
ERR
(Bit 2)
X
0/1
CRC ERR
(Bit 1)
X
0/1
N/A
(Bit 0)
X
X
0/1 indicates that the value of the bit will be 0 or 1 depending on the condition of the packet. An ‘X’ indicates that
the value should be ignored.
8. Transmitter Circuits
Circuits within the transmitter include a transmitter state machine, a small FIFO for pipelining the packet data,
preamble generator, CRC generator, parallel to serial converter, backoff generator, interpacket gap timer and
time domain reflectometer (TDR) counter. Additional circuits involved in packet transmission are described in
the Transceiver section of this document.
The transmitter state machine provides sequencing of events for the transmitter, including idle, preamble, data,
CRC, interpacket gap, jam and backoff. It detects various transmit error conditions and sets appropriate bits
within the DLCR registers.
The pipeline FIFO provides elastic buffering that the buffer controller can load with data to be transmitted. The
chip’s CRC generator calculates the 32-bit CRC on the destination and source address, the length field and the
data field as specified by the ISO/ANSI/IEEE 8802-3 specification for Ethernet. This value is appended to the
end of the packet when it is transmitted.
8.1 Media Access Control
The MB86967 transmitter state machine implements the Carrier Sense, Multiple Access with Collision Detection
(CSMA/ CD) network media-access protocol. The MB86967 monitors the network for any other node’s carrier,
and defers transmission (collision avoidance) while other nodes are transmitting, except when DSC, DLCR4<0>,
is high. Collision detection handles collisions that may still occur when two nodes separated on the network
begin transmitting at nearly the same time. All nodes monitor the network for collisions and, when involved in
one, transmit a 32-bit jam signal to reinforce the collision and then terminate transmission. After waiting a pseudo-
random backoff interval, generated as described below, the node automatically retries transmission of the packet.
Packets on the network must be separated by at least 9.6 microseconds, the ‘interpacket gap’ (IPG) during
which the network medium is specified to be idle. The MB86967 transmitter state machine measures this IPG
starting from the end of a packet on the network, and does not attempt to transmit until the end of the IPG. If
carrier reappears on the network during the first two-thirds of the IPG, the MB86967 resets the timer to re–time
the IPG from the end of the new transmission. Such an event can occur during a collision, since data and carrier
indications can be corrupted by the superimposition of the two packets. During the last one-third of the IPG, the
MB86967 ignores the occurrence of a carrier indication, in accordance with 8802-3, to ensure fairness and
equality in access to the network. Thus, if one station begins transmission slightly ahead of another, there is no
advantage to the earlier start. Both nodes transmit, a collision occurs, and backoff interval differentials resolve
the media-access contention.
8.2 Transmit Packet Processing
To transmit one or more packets, the host system first loads the packet(s), preceded by a two-byte header giving
their lengths, into a transmit buffer by writing the data to the Buffer Memory Port Register, BMPR8. Only the
destination address, source address, length and data fields of the packets are loaded by the system. After the
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