English
Language : 

PXS30 Datasheet, PDF (98/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller
Electrical characteristics
Table 48. DRAM pads DC electrical specifications (VDD_HV_DRAM (continued) = 3.3 V)
No.
Symbol
Parameter
Condition
Min
Max
Unit
3 VDD_HV_DRAM_VTT CC Termination voltage1
—
VDD_HV_DRAM_VREF VDD_HV_DRAM_VREF V
× 0.05
+ 0.05
4
VIH
CC Input high voltage
—
VDD_HV_DRAM_VREF +
—
V
0.20
5
VIL
CC Input low voltage
—
VDD_HV_DRAM_VREF V
× 0.2
6
VOH
CC Output high voltage
ODT
VDD_HV_DRAM_VTT
—
V
enabled2
+ 0.8
ODT
0.8 × VDD_HV_DRAM
—
V
disabled3
7
VOL
CC Output low voltage
ODT
—
enabled2
VDD_HV_DRAM_VTT
V
× 0.8
ODT
—
disabled3
VDD_HV_DRAM
V
× 0.2
NOTES:
1 BGA473: Termination voltage can be supplied via package pins. BGA257 Termination voltage internally tied as the
BGA257 does not provide DRAM interface. Disable ODT
2 Termination voltage is supplied by VDD_HV_DRAM_VTT.
3 Tie VDD_HV_DRAM_VTT to VSS and disable ODT
Table 49. Output drive current @ VDDE = 3.3 V (±10%)
No.
Pad Name
Drive Mode
Minimum IOH (mA)1
Minimum IOL (mA)2
1
DRAM ACC
111
–16
16
2
DRAM DQ
3
DRAM CLK
NOTES:
1 IOH is defined as the current sourced by the pad to drive the output to VOH.
2 IOL is defined as the current sunk by the pad to drive the output to VOL.
Table 50. DRAM pads AC electrical specifications (VDD_HV_DRAM = 3.3 V)
No. Pad Name
Prop. Delay (ns)
L  H/H  L1
Min
Max
Output Slew rate
Rise/Fall (V/ns)
Min
Max
Drive Load
(pF)
Drive/Slew
Rate Select
MSB, LSB
1 DRAM ACC
1.4/1.4
2.4/2.4
3.1/2.5
5.6/5.4
5
111
1.7/1.7
2.7/2.7
0.9/1.1
1.7/2.0
20
111
2 DRAM DQ
1.4/1.4
2.4/2.4
3.1/2.5
5.6/5.4
5
111
1.7/1.7
2.7/2.7
0.9/1.1
1.7/2.0
20
111
3 DRAM CLK
1.4/1.4
2.4/2.4
3.1/2.5
5.7/5.7
5
111
1.6/1.6
2.6/2.6
1.1/1.3
2.3/2.3
20
111
PXS30 Microcontroller Data Sheet, Rev. 1
98
Preliminary—Subject to Change Without Notice
Freescale Semiconductor