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PXS30 Datasheet, PDF (100/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller | |||
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Electrical characteristics
Table 53. DRAM pads AC electrical specifications (VDD_HV_DRAM = 2.5 V)
No.
Pad Name
Prop. Delay (ns)
L ï® H/H ï® L1
Min
Max
Rise/Fall Edge (ns)
Min
Max
Drive
Load
(pF)
Drive/Slew
Rate Select
MSB, LSB
1
DRAM ACC
1.4/1.5
2.5/2.4
2.1/2.1
4.3/4.1
5
011
1.7/1.7
2.8/2.7
0.6/0.7
1.1/1.3
20
2
DRAM DQ
1.4/1.5
2.5/2.4
2.1/2.1
4.3/4.1
5
011
1.7/1.7
2.8/2.7
0.6/0.7
1.1/1.3
20
3
DRAM CLK
1.4/1.4
2.4/2.4
2.1/2.1
4.4/4.1
5
011
1.6/1.6
2.7/2.7
0.6/0.7
1.6/1.8
20
NOTES:
1 L ï® H signifies low-to-high propagation delay and H ï® L signifies high-to-low propagation delay.
3.19.3 DRAM pads electrical specification (VDD_HV_DRAM = 1.8 V)
Table 54. DRAM pads DC electrical specifications (VDD_HV_DRAM = 1.8 V)
No.
Symbol
Parameter
Condition
Min
Max
Unit
1
VDD_HV_DRAM SR I/O supply voltage
2 VDD_HV_DRAM_VREF CC Input reference voltage
3 VDD_HV_DRAM_VTT CC Termination voltage1
â
1.7
1.9
V
â
0.49 Ã VDD_HV_DRAM 0.51 Ã VDD_HV_DRAM V
â
VDD_HV_DRAM_VREF VDD_HV_DRAM_VREF
â 0.04
+ 0.04
V
4
VIH
CC Input high voltage
â
VDD_HV_DRAM_VREF
â
+ 0.125
V
5
VIL
CC Input low voltage
â
â
VDD_HV_DRAM_VREF
â 0.125
V
6
VOH
CC Output high voltage
ODT
VDD_HV_DRAM_VTT
â
enabled2
+ 0.81
V
ODT 0.8 Ã VDD_HV_DRAM
â
disabled3
V
7
VOL
CC Output low voltage
ODT
enabled2
â
VDD_HV_DRAM_VTT
â 0.81
V
ODT
disabled3
â
0.2 Ã VDD_HV_DRAM V
NOTES:
1 BGA473: Termination voltage can be supplied via package pins. BGA257 Termination voltage internally tied as the
BGA257 does not provide DRAM interface. Disable ODT
2 Termination voltage is supplied by VDD_HV_DRAM_VTT.
3 Tie VDD_HV_DRAM_VTT to VSS and disable ODT
PXS30 Microcontroller Data Sheet, Rev. 1
100
PreliminaryâSubject to Change Without Notice
Freescale Semiconductor
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