PXS30 Datasheet, PDF (16/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller

Introduction
— Double buffer (to capture rising edge and falling edge)
— Separate prescaler for each counter
— Selectable clock source
— 0–100% pulse measurement
— Rotation direction flag (Quad decoder mode)
• Maximum count rate
— Equals peripheral clock/2 for external event counting
— Equals peripheral clock for internal clock counting
• Cascadeable counters
• Programmable count modulo
• Quadrature decode capabilities
• Counters can share available input pins
• Count once or repeatedly
• Preloadable counters
• Pins available as GPIO when timer functionality not in use
• DMA support
1.5.21 Redundancy Control and Checker Unit (RCCU)
The RCCU checks all outputs of the sphere of replication (addresses, data, control signals). It has the
following features:
• Duplicated module to guarantee highest possible diagnostic coverage (check of checker)
• Replicated IP to be used as checkers on the PBRIDGE output, flash controller output, SRAM
Output, DMA Channel Mux inputs
1.5.22 Software Watchdog Timer (SWT)
This module implements the features below:
• Duplicated periphery to guarantee that safety targets (SIL3) are achieved
• Fault-tolerant output
• Safe internal RC oscillator as reference clock
• Windowed watchdog
• Program flow control monitor with 16-bit pseudorandom key generation
• Allows high level of safety (SIL3 monitor)
1.5.23 Fault Collection and Control Unit (FCCU)
The FCCU module has the following features:
• Redundant collection of hardware checker results
• Redundant collection of error information and latch of faults from critical modules on the device
PXS30 Microcontroller Data Sheet, Rev. 1
16
Preliminary—Subject to Change Without Notice
Freescale Semiconductor