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PXS30 Datasheet, PDF (85/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller
Electrical characteristics
From this formula, in the worst case (when VA is maximum, that is for instance 5 V), assuming to accept
a maximum error of half a count, a constraint is evident on CF value:
CF  8192  CS
Eqn. 20
Table 24. ADC conversion characteristics
No. Symbol
Parameter
Conditions1
Min Typ Max Unit
1 fCK SR ADC clock frequency (depends on ADC
—
configuration)
(The duty cycle depends on AD_CK2 frequency)
3 — 60 MHz
2 fs SR Sampling frequency
3 tADC_S D Sample time3
4 tADC_E P Evaluation time4
5 CS5 D ADC input sampling capacitance
6 CP15 D ADC input pin capacitance 1
7 CP25 D ADC input pin capacitance 2
8 RSW15 D Channel selection switch resistance
9
10 RAD5 D Sample switching resistance
11 IINJ T Current injection
—
— — 959 kHz
60 MHz
383 — — ns
TBD
600 — — ns
—
— — 7.32 pF
—
— — 2.5 pF
—
— — TBD pF
VREF range = 4.5 to 5.5 V
VREF range = 3.0 to 3.6 V
—
— — 1.0 k
— — 1.2 k
— — 825 
Current injection on one ADC –3 — 3 mA
input channel, different from
the converted one. Other
parameters stay within
specified limits as long as the
ADC supply stays within its
specified limits due to the
current injection.
12 INL P Integral non linearity
13 DNL P Differential non linearity6
—
–3 — 3 LSB
—
–1.0 — 1.0 LSB
14 OFS T Offset error
—
–4 — 4 LSB
15 GNE T Gain error
—
–4 — 4 LSB
16 TUE P Total unadjusted error
—
–6 — 6 LSB
17 TUE T Total unadjusted error with current injection
—
TBD — TBD LSB
18 SNR T Signal-to-noise ratio
—
69 — — dB
19 THD T Total harmonic distortion
—
TBD — — dB
20 SINAD T Signal-to-noise and distortion
—
65 — — dB
21 ENOB T Effective number of bits
—
10.5 — — bits
NOTES:
1 VDD = 3.3 V, TJ = –40 to +150 °C, unless otherwise specified and analog input voltage from VAGND to VAREF.
2 AD_CK clock is always half of the ADC module input clock defined via the auxiliary clock divider for the ADC.
PXS30 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
85