PXS30 Datasheet, PDF (123/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller

Electrical characteristics
Table 68. PDI electrical characteristics (continued)
No. Symbol
Parameter
Conditions Min
2
t_{PDI_IS} SR Input setup time¹
3 t_{PDI_IH} SR Input hold time¹
—
3
—
3
NOTES:
1 _{Data can be captured at both launching and capturing edge of PDI_CLK.}
Max Unit
—
ns
—
ns
PDI_CLOCK
PDI_DATA[15:0]
PDI_LINE_V
PDI_FRAME_V
1
2
3
Input Data Valid
PDI timing
3.22.8 Fast ethernet interface
MII signals use CMOS signal levels compatible with devices operating at either 5.0 V or 3.3 V. Signals
are not TTL compatible. They follow the CMOS electrical characteristics.
3.22.8.1 MII receive signal timing (RXD[3:0], RX_DV, RX_ER, and RX_CLK)
The receiver functions correctly up to a RX_CLK maximum frequency of 25 MHz +1%. There is no
minimum frequency requirement. In addition, the system clock frequency must exceed four times the
RX_CLK frequency.
Table 69. MII receive signal timing
No.
Parameter
1 RXD[3:0], RX_DV, RX_ER to RX_CLK setup
2 RX_CLK to RXD[3:0], RX_DV, RX_ER hold
3 RX_CLK pulse width high
4 RX_CLK pulse width low
Min
5
5
40%
40%
Max
—
—
60%
60%
Unit
ns
ns
RX_CLK period
RX_CLK period
PXS30 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
123