PXS30 Datasheet, PDF (13/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller

Introduction
1.5.16 FlexCAN
• Thirty-two message buffers each
• Full implementation of the CAN protocol specification, Version 2.0B
• Programmable acceptance filters
• Individual Rx filtering per message buffer
• Short latency time for high priority transmit messages
• Arbitration scheme according to message ID or message buffer number
• Listen-only mode capabilities
• Programmable clock source: system clock or oscillator clock
• Reception queue possible by setting more than one Rx message buffer with the same ID
• Backwards compatible with previous FlexCAN modules
• Safety CAN features on 1 CAN module as implemented on MPC5604P
1.5.17 Dual-channel FlexRay controller
• Full implementation of FlexRay Protocol Specification 2.1
• Sixty-four configurable message buffers can be handled
• Message buffers configurable as Tx, Rx, or RxFIFO
• Message buffer size configurable
• Message filtering for all message buffers based on FrameID, cycle count, and message ID
• Programmable acceptance filters for RxFIFO message buffers
• Dual channel, each at up to 10 Mbit/s data rate
1.5.18 Periodic Interrupt Timer (PIT)
The PIT module implements the features below:
• Four general-purpose interrupt timers
• 32-bit counter resolution
• Clocked by system clock frequency
• 32-bit counter for real time interrupt, clocked from main external oscillator
• Can be used for software tick or DMA trigger operation
1.5.19 System Timer Module (STM)
The STM implements the features below:
• Duplicated periphery to guarantee that safety targets (SIL3) are achieved
• Up-counter with four output compare registers
• OS task protection and hardware tick implementation as per current state-of-the-art AUTOSAR
requirement
PXS30 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
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