PXS30 Datasheet, PDF (2/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller

Introduction
to assist with users’ implementations. See Section 3, Developer support, for more information.
1 Introduction
1.1 Document overview
This document describes the features of the family and options available within the family members, and
highlights important electrical and physical characteristics of the devices.
This document provides electrical specifications, pin assignments, and package diagrams for the PXS30
series of microcontroller units (MCUs). For functional characteristics, see the PXS30 Microcontroller
Reference Manual.
1.2 Device comparison
Table 1. PXS30 Family Feature Set
CPU
Buses
XBAR
Memory
Features
Type
Architecture
Execution speed
Nominal platform
frequency (in 1:1, 1:2,
and 1:3 modes)
MMU
Instruction set PPC
Instruction set VLE
Instruction cache
Data cache
MPU
Core bus
Internal periphery bus
Master  slave ports
Static RAM (SRAM)
Code Flash memory
Data Flash memory
PXS3010
PXS3015
PXS3020
2 × e200z7d (SoR¹) in lock-step or decoupled operation
Harvard
0–150 MHz (+2% FM) 0–180 MHz (+2% FM) 0–180 MHz (+2% FM)
0–75 MHz (+2% FM) 0–90 MHz (+2% FM) 0–90 MHz (+2% FM)
64 entries (SoR)
Yes
Yes
16 KB, 4-way with EDC (SoR)
16 KB, 4-way with EDC (SoR)
Yes (SoR)
32-bit address, 64-bit data
32-bit address, 32-bit data
Yes (SoR)
256 KB (ECC)
1 MB²
384 KB (ECC)
1.5 MB²
64 KB²
512 KB (ECC)
2 MB²
PXS30 Microcontroller Data Sheet, Rev. 1
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor