PXS30 Datasheet, PDF (111/139 Pages) Freescale Semiconductor, Inc – PXS30 Microcontroller

Electrical characteristics
Table 61. DDR and DDR2 (DDR2-400) SDRAM timing specifications (continued)
At recommended operating conditions with V_{DD_MEM_IO} of 5%
No.
Symbol
Parameter
Min
Max Unit
14
t_DQSQ
CC DQS-DQ skew for DQS and associated DQ inputs² –(t_CK/4 – 600) (t_CK/4 – 600) ps
15
t_DQSEN
CC DQS window start position related to CAS read
command^{1, 2, 3, 4, 5}
TBD
TBD
ps
NOTES:
1 _{Measured with clock pin loaded with differential 100 ohm termination resistor.}
2 _{All transitions measured at mid-supply (VDD_MEM_IO/2).}
3 _{Measured with all outputs except the clock loaded with 50 ohm termination resistor to VDD_MEM_IO/2.}
4 _{In this window, the first rising edge of DQS should occur. From the start of the window to DQS rising edge, DQS}
should be low.
5 _{Window position is given for tDQSEN = 2.0 tCK. For other values of tDQSEN, window position is shifted accordingly.}
Figure 31 shows the DDR SDRAM write timing.
t_CH
t_CL
MCK
t_CK
DQS
t_DQSS
DQ, DM (out)
t_DS t_DH
Figure 31. DDR write timing
Figure 32 and Figure 33 show the DDR SDRAM read timing.
DQS (in)
Any DQ (in)
t_DQSQ
t_DQSQ
Figure 32. DDR read timing, DQ vs. DQS
PXS30 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
111