MC9S08JM16 Datasheet, PDF (93/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Parallel Input/Output
7
R
W
Reset
0
6
5
4
3
2
PTFDD6
PTFDD5
PTFDD4
0
0
0
0
0
Figure 6-28. Data Direction for Port F (PTFDD)
1
PTFDD1
0
0
PTFDD0
0
Table 6-27. PTFDD Register Field Descriptions
Field
Description
6:4, 1:0
PTFDD
[6:4, 1:0]
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
6.5.12 Port F Pin Control Registers (PTFPE, PTFSE, PTFDS)
In addition to the I/O control, port F pins are controlled by the registers listed below.
7
R
W
Reset
0
6
5
4
3
2
PTFPE6
PTFPE5
PTFPE4
0
0
0
0
0
Figure 6-29. Internal Pullup Enable for Port F (PTFPE)
1
PTFPE1
0
0
PTFPE0
0
Table 6-28. PTFPE Register Field Descriptions
Field
Description
6:4, 1:0
PTFPE
[6:4, 1:0]
Internal Pullup Enable for Port F Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port F bit n.
1 Internal pullup device enabled for port F bit n.
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor
93