MC9S08JM16 Datasheet, PDF (248/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface (S08SPI16V1)
Pin Mode
Normal
Bidirectional
Normal
Bidirectional
Table 15-4. Bidirectional Pin Configurations
SPC0
0
1
0
1
BIDIROE
MISO
Master Mode of Operation
X
Master In
0
MISO not used by SPI
1
Slave Mode of Operation
X
Slave Out
0
Slave In
1
Slave I/O
MOSI
Master Out
Master In
Master I/O
Slave In
MOSI not used by SPI
15.3.3 SPI Baud Rate Register (SPIxBR)
This register is used to set the prescaler and bit rate divisor for an SPI master. This register may be read or
written at any time.
7
6
5
4
3
R
0
0
SPPR2
SPPR1
SPPR0
W
2
SPR2
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 15-7. SPI Baud Rate Register (SPIxBR)
1
SPR1
0
0
SPR0
0
Table 15-5. SPIxBR Register Field Descriptions
Field
Description
6:4
SPPR[2:0]
SPI Baud Rate Prescale Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate prescaler
as shown in Table 15-6. The input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler
drives the input of the SPI baud rate divider (see Figure 15-15). See Section 15.4.6, “SPI Baud Rate Generation,”
for details.
2:0
SPR[2:0]
SPI Baud Rate Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate divider as shown in
Table 15-7. The input to this divider comes from the SPI baud rate prescaler (see Figure 15-15). See
Section 15.4.6, “SPI Baud Rate Generation,” for details.
MC9S08JM16 Series Data Sheet, Rev. 2
248
Freescale Semiconductor