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MC9S08JM16 Datasheet, PDF (46/386 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 4 Memory
1 This reserved bit must always be written to 0.
Nonvolatile flash registers, shown in Table 4-4, are located in the flash memory. These registers include
an 8-byte backdoor key which optionally can be used to gain access to secure memory resources. During
reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the flash memory
are transferred into corresponding FPROT and FOPT working registers in the high-page registers to
control security and block protection options.
Table 4-4. Nonvolatile Register Summary
Address Register Name
0xFFAE Reserved to store
FTRIM
0xFFAF Reserved to store
MCGTRIM
0xFFB0 –
0xFFB7
NVBACKKEY
0xFFB8 –
0xFFBC
Reserved
0xFFBD NVPROT
0xFFBE Reserved
0xFFBF NVOPT
Bit 7
0
—
—
FPS7
—
KEYEN
6
0
—
—
FPS6
—
FNORED
5
4
3
2
0
0
0
0
TRIM
8-Byte Comparison Key
—
—
FPS5
—
0
—
—
FPS4
—
0
—
—
FPS3
—
0
—
—
FPS2
—
0
1
Bit 0
0
FTRIM
—
—
FPS1
—
SEC01
—
—
FPDIS
—
SEC00
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the flash if needed (normally through the background
debug interface) and verifying that flash is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC01:SEC00) to the unsecured state (1:0).
4.3 RAM (System RAM)
The MC9S08JM16 series includes static RAM. The locations in RAM below 0x0100 can be accessed
using the more efficient direct addressing mode, and any single bit in this area can be accessed with the bit
manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed
program variables in this area of RAM is preferred.
The RAM retains data when the MCU is in low-power wait, stop2, or stop3 mode. At power-on, the
contents of RAM are uninitialized. RAM data is unaffected by any reset provided that the supply voltage
does not drop below the minimum value for RAM retention.
For compatibility with M68HC05 MCUs, the HCS08 resets the stack pointer to 0x00FF. In the
MC9S08JM16 series, re-initialize the stack pointer to the top of the RAM so the direct-page RAM can be
used for frequently accessed RAM variables and bit-addressable program variables. Include the following
2-instruction sequence in your reset initialization routine (where RamLast is equated to the highest address
of the RAM in the Freescale-provided equate file).
MC9S08JM16 Series Data Sheet, Rev. 2
46
Freescale Semiconductor