MC9S08JM16 Datasheet, PDF (327/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 18
Development Support
18.1 Introduction
This chapter describes the single-wire background debug mode (BDM), which uses the on-chip
background debug controller (BDC) module, and the independent on-chip real-time in-circuit emulation
(ICE) system, which uses the on-chip debug (DBG) module.
18.1.1 Forcing Active Background
The method for forcing active background mode depends on the specific HCS08 derivative. For the
MC9S08JM16 Series, you can force active background mode by holding the BKGD pin low as the MCU
exits the reset condition independent of what caused the reset. If no debug pod is connected to the BKGD
pin, the MCU will always reset into normal operating mode.
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor
327