MC9S08JM16 Datasheet, PDF (86/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Parallel Input/Output
7
R
W
6
5
4
3
2
1
0
PTCSE5
PTCSE4
PTCSE3
PTCSE2
PTCSE1
PTCSE0
Reset
0
0
1
1
1
1
1
1
Figure 6-15. Output Slew Rate Control Enable for Port C (PTCSE)
Table 6-14. PTCSE Register Field Descriptions
Field
Description
5:0
PTCSE[5:0]
Output Slew Rate Control Enable for Port C Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTC pin. For port C pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port C bit n.
1 Output slew rate control enabled for port C bit n.
7
R
W
Reset
0
6
5
4
3
2
1
PTCDS5
PTCDS4
PTCDS3
PTCDS2
PTCDS1
0
0
0
0
0
0
Figure 6-16. Output Drive Strength Selection for Port C (PTCDS)
0
PTCDS0
0
Table 6-15. PTCDS Register Field Descriptions
Field
Description
5:0
Output Drive Strength Selection for Port C Bits — Each of these control bits selects between low and high
PTCDS[5:0] output drive for the associated PTC pin.
0 Low output drive enabled for port C bit n.
1 High output drive enabled for port C bit n.
MC9S08JM16 Series Data Sheet, Rev. 2
86
Freescale Semiconductor