MC9S08JM16 Datasheet, PDF (85/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Parallel Input/Output
7
R
W
Reset
0
6
5
4
3
2
PTCDD5 PTCDD4 PTCDD3 PTCDD2
0
0
0
0
0
Figure 6-13. Data Direction for Port C (PTCDD)
1
PTCDD1
0
0
PTCDD0
0
Table 6-12. PTCDD Register Field Descriptions
Field
Description
5:0
Data Direction for Port C Bits — These read/write bits control the direction of port C pins and what is read for
PTCDD[5:0] PTCD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.
6.5.6 Port C Pin Control Registers (PTCPE, PTCSE, PTCDS)
In addition to the I/O control, port C pins are controlled by the registers listed below.
7
R
W
Reset
0
6
5
4
3
2
PTCPE5
PTCPE4
PTCPE3
PTCPE2
0
0
0
0
0
Figure 6-14. Internal Pullup Enable for Port C (PTCPE)
1
PTCPE1
0
0
PTCPE0
0
Table 6-13. PTCPE Register Field Descriptions
Field
Description
5:0
PTCPE[5:0]
Internal Pullup Enable for Port C Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTC pin. For port C pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port C bit n.
1 Internal pullup device enabled for port C bit n.
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor
85