MC9S08JM16 Datasheet, PDF (61/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5
Resets, Interrupts, and System Configuration
5.1 Introduction
This chapter discusses basic reset and interrupt mechanisms and the various sources of reset and interrupts
in the MC9S08JM16 series. Some interrupt sources from peripheral modules are discussed in greater detail
in other chapters of this reference manual. This chapter gathers basic information about all reset and
interrupt sources in one place for easy reference. A few reset and interrupt sources, including the computer
operating properly (COP) watchdog, are not part of on-chip peripheral systems with their own sections but
are part of the system control logic.
5.2 Features
Reset and interrupt features include:
• Multiple sources of reset for flexible system configuration and reliable operation
• Reset status register (SRS) to indicate source of most recent reset
• Separate interrupt vectors for each module (reduces polling overhead) (see Table 5-1)
5.3 MCU Reset
Resetting the MCU provides a way to start processing from a known set of initial conditions. During reset,
most control and status registers are forced to initial values and the program counter is loaded from the
reset vector (0xFFFE:0xFFFF). On-chip peripheral modules are disabled and I/O pins are initially
configured as general-purpose high-impedance inputs with pullup devices disabled. The I bit in the
condition code register (CCR) is set to block maskable interrupts, so the user program has a chance to
initialize the stack pointer (SP) and system control settings. SP is forced to 0x00FF at reset.
The MC9S08JM16 series has eight sources for reset:
• Power-on reset (POR)
• Low-voltage detect (LVD)
• Computer operating properly (COP) timer
• Illegal opcode detect (ILOP)
• Illegal address detect (ILAD)
• Background debug forced reset
• External reset pin (RESET)
• Clock generator loss of lock and loss of clock reset (LOC)
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor
61