MC68HC705P9 Datasheet, PDF (89/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel Input/Output (I/O) Ports
Port C
7.5.2 Data Direction Register C (DDRC)
Data direction register C determines whether each port C pin is an input
or an output.
$0006
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1
0
0
0
0
0
0
0
Figure 7-9. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC[7:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC[7:0], configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE: Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Writing to bits DDRC7–DDRC3 while the ADC is on can produce
unpredictable ADC results.
Figure 7-10 shows the I/O logic of port C.
READ DATA DIRECTION REGISTER C ($0006)
WRITE DATA DIRECTION REGISTER C ($0006)
RESET
DDRCx
WRITE PORT C DATA REGISTER ($0002)
PCx
PCx
READ PORT C DATA REGISTER ($0002)
Figure 7-10. Port C I/O Logic
MC68HC705P9 — Rev. 4.0
MOTOROLA
Parallel Input/Output (I/O) Ports
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Technical Data
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