MC68HC705P9 Datasheet, PDF (35/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Memory
Input/Output Register Summary
Addr.
Name
Bit 7
6
$0015
Read: Bit 7
6
Input Capture Register Low
(ICRL) Write:
See page 114.
Reset:
Read:
$0016 ^{Output Compare Register High}
Bit 15 14
(OCRH) Write:
See page 115.
Reset:
Read:
Output Compare Register Low
Bit 7
6
$0017
(OCRL) Write:
See page 115.
Reset:
$0018
Read: Bit 15 14
Timer Register High
(TRH) Write:
See page 112.
Reset:
$0019
Read: Bit 7
6
Timer Register Low
(TRL) Write:
See page 112.
Reset:
$001A
Read: Bit 15 14
Alternate Timer Register High
(ATRH) Write:
See page 113.
Reset:
Read: Bit 7
6
$001B
Alternate Timer Register Low
(ATRL) Write:
See page 113.
Reset:
Read: 0
0
$001C ^{EPROM Programming Register}
(EPROG) Write: R
R
See page 38.
Reset:
5
4
3
2
1
Bit 0
5
4
3
2
1
Bit 0
Unaffected by reset
13
12
11
10
Unaffected by reset
5
4
3
2
Unaffected by reset
13
12
11
10
9
Bit 8
1
Bit 0
9
Bit 8
Reset initializes TRH to $FF
5
4
3
2
1
Bit 0
Reset initializes TRL to $FC
13
12
11
10
9
Bit 8
Reset initializes ATRH to $FF
5
4
3
2
1
Bit 0
Reset initializes ATRL to $FC
0
0
0
0
LATCH
EPGM
R
R
R
R
Unaffected by reset
= Unimplemented
R = Reserved
Figure 3-2. I/O Register Summary (Sheet 3 of 4)
U = Unaffected
MC68HC705P9 — Rev. 4.0
MOTOROLA
Memory
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Technical Data
35