MC68HC705P9 Datasheet, PDF (122/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Input/Output Port (SIOP)
The first falling edge on PB7/SCK begins a transmission. At this time the
first bit of received data is accepted at the PB6/SDI pin and the first bit
of transmitted data is presented at the PB5/SDO pin.
10.4.1.2 PB5/SDO
The PB5/SDO pin is the SIOP data output. Between transfers, the state
of the PB5/SDO pin reflects the value of the last bit shifted out on the
previous transmission, if there was one. To preset the beginning state,
write to the corresponding port data bit before enabling the SIOP. On the
first falling edge on the PB7/SCK pin, the first data bit to be shifted out
appears at the PB5/SDO pin.
After SPE is set, the PB5/SDO output driver can be disabled by writing
a zero to the corresponding data direction register bit of the port, thereby
configuring PB5/SDO as a high-impedance input.
10.4.1.3 PB6/SDI
The PB6/SDI pin is the SIOP data input. Valid SDI data must be present
for an SDI setup time, t_S, before the rising edge of the serial clock and
must remain valid for an SDI hold time, t_H, after the rising edge of the
serial clock. (See Table 10-1 and Table 10-2.)
Technical Data
122
Serial Input/Output Port (SIOP)
For More Information On This Product,
Go to: www.freescale.com
MC68HC705P9 — Rev. 4.0
MOTOROLA