MC68HC705P9 Datasheet, PDF (102/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Timer
Freescale Semiconductor, Inc.
Addr.
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
Name
R/W Bit 7 6
5
4
3
2
1
Timer Control Register ^Read: _{ICIE OCIE TOIE}
0
0
0 IEDG
(TCR) Write:
See page 109. _{Reset: 0}
0
0
0
0
0
U
Timer Status Register ^{Read: ICF OCF TOF}
0
0
0
0
(TSR) Write:
See page 110. _{Reset: U}
U
U
0
0
0
0
Input Capture Register High ^{Read: Bit 15 14}
13
12
11
10
9
(ICRH) Write:
See page 114. _Reset:
Unaffected by reset
Input Capture Register Low ^{Read: Bit 7}
6
5
4
3
2
1
(ICRL) Write:
See page 114. _Reset:
Unaffected by reset
Output Compare Register High ^Read: _{Bit 15}
14
13
12
11
10
9
(OCRH) Write:
See page 115. _Reset:
Unaffected by reset
Output Compare Register Low ^Read: _{Bit 7}
6
5
4
3
2
1
(OCRL) Write:
See page 115. _Reset:
Unaffected by reset
Timer Register High ^{Read: Bit 15 14}
13
12
11
10
9
(TRH) Write:
See page 112. _Reset:
Reset initializes TRH to $FF
Timer Register Low ^{Read: Bit 7}
6
5
4
3
2
1
(TRL) Write:
See page 112. _Reset:
Reset initializes TRL to $FC
Alternate Timer Register High ^{Read: Bit 15 14}
13
12
11
10
9
(ATRH) Write:
See page 113.
Reset initializes ATRH to $FF
Alternate Timer Register Low ^{Read: Bit 7}
6
5
4
3
2
1
(ATRL) Write:
See page 113.
Reset initializes ATRL to $FC
= Unimplemented
U = Unaffected
Bit 0
OLVL
0
0
0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Figure 9-2. Timer I/O Register Summary
Technical Data
102
Timer
For More Information On This Product,
Go to: www.freescale.com
MC68HC705P9 — Rev. 4.0
MOTOROLA