MC68HC705P9 Datasheet, PDF (119/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

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Freescale Semiconductor, Inc.
Serial Input/Output Port (SIOP)
Introduction
INTERNAL BUS
SIOP DATA REGISTER
76543210
FROM MOR SIOP
SIOP
CONTROL
PIN
CONTROL
LOGIC
AND
DDR
INTERNAL
CLOCK
(f_OSC ÷ 2)
DIVIDE
BY 4
SPE
MSTR
SPIF
DCOL
CLOCK
LOGIC
MS
Figure 10-1. SIOP Block Diagram
PB5/SDO
PB7/SCK
PB6/SDI
Name
Bit 7
6
5
4
3
2
SIOP Control Register ^Read: ₀
SPE
0 MSTR 0
0
(SCR) Write:
See page 125. _{Reset: 0}
0
0
0
0
0
SIOP Status Register ^{Read: SPIF DCOL}
0
0
0
0
(SSR) Write:
See page 126. _{Reset: 0}
0
0
0
0
0
SIOP Data Register ^Read: _{Bit 7}
6
(SDR) Write:
See page 127. _Reset:
5
4
3
2
Unaffected by reset
= Unimplemented
Figure 10-2. SIOP I/O Register Summary
1
Bit 0
0
0
0
0
0
0
0
0
1
Bit 0
MC68HC705P9 — Rev. 4.0
MOTOROLA
Serial Input/Output Port (SIOP)
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Technical Data
119