MC68HC705P9 Datasheet, PDF (85/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel Input/Output (I/O) Ports
Port B
7.4 Port B
Port B is a 3-bit I/O port that shares its pins with the serial I/O port
(SIOP).
NOTE: Do not use port B for general-purpose I/O while the SIOP is enabled.
7.4.1 Port B Data Register (PORTB)
The port B data register contains a latch for each of the three port B pins.
$0001 Bit 7
6
5
4
3
2
Read:
0
0
0
PB7
PB6
PB5
Write:
Reset:
Unaffected by reset
Alternate
Function:
SCK
SDI
SDO
1
Bit 0
0
0
= Unimplemented
Figure 7-5. Port B Data Register (PORTB)
PB[7:5] — Port B Data Bits
These read/write bits are software programmable bits. Data direction
of each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
NOTE:
Writing to data direction register B does not affect the data direction of
port B pins that are being used by the SIOP. However, data direction
register B always determines whether reading port B returns the states
of the latches or the states of the pins.
SCK — Serial Clock
When the SIOP is enabled, SCK is the SIOP clock output (in master
mode) or the SIOP clock input (in slave mode).
MC68HC705P9 — Rev. 4.0
MOTOROLA
Parallel Input/Output (I/O) Ports
For More Information On This Product,
Go to: www.freescale.com
Technical Data
85