MC68HC705P9 Datasheet, PDF (38/160 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory
Freescale Semiconductor, Inc.
3.6.1.1 EPROM Programming Register
The EPROM programming register contains the control bits for
programming the EPROM/OTPROM.
$001C Bit 7
6
5
4
3
2
1
Read:
0
0
0
0
0
0
LATCH
Write:
R
R
R
R
R
R
Reset:
0
0
0
0
0
0
0
R = Reserved
Figure 3-3. EPROM Programming Register (EPROG)
Bit 0
EPGM
0
LATCH — EPROM Bus Latch
This read/write bit latches the address and data buses for
EPROM/OTPROM programming. Clearing the LATCH bit
automatically clears the EPGM bit. EPROM/OTPROM data cannot be
read while the LATCH bit is set. Resets clear the LATCH bit.
1 = Address and data buses configured for EPROM/OTPROM
programming
0 = Address and data buses configured for normal operation
EPGM bit— EPROM Programming
This read/write bit applies the voltage from the IRQ/V_PP pin to the
EPROM/OTPROM. To write the EPGM bit, the LATCH bit must
already be set. Clearing the LATCH bit also clears the EPGM bit.
Resets clear the EPGM bit.
1 = EPROM/OTPROM programming power switched on
0 = EPROM/OTPROM programming power switched off
NOTE:
Writing logic ones to both the LATCH and EPGM bits with a single
instruction sets LATCH and clears EPGM. LATCH must be set first by a
separate instruction.
Bits 7–3 and Bit 1— Reserved
Bits 7–3 and bit 1 are factory test bits that always read as logic zeros.
Technical Data
38
Memory
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Go to: www.freescale.com
MC68HC705P9 — Rev. 4.0
MOTOROLA