1GB-DDR3L-AS4C64M16D3L Datasheet, PDF (73/90 Pages) Alliance Semiconductor Corporation – JEDEC Standard Compliant

1Gb DDR3L – AS4C64M16D3L
Figure 45. WRITE(BC4) OTF to Precharge operation
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK#
CK
Notes 3
COMMAND
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Notes 4
ADDRESS
Bank
Col n
DQS, DQS#
Notes 2
DQ
WL = 5
t_WPRE
4 Clocks
t_WPST
Din
Din
Din
Din
n
n+1 n+2 n+3
NOTES:
1. BC4 OTF, WL = 5 (CWL = 5, AL = 0)
2. DIN n (or b) = data-in from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 OTF setting activated by MR0[A1:0 = 01] and A12 = 0 during WRITE command at T0.
5. The write recovery time (tWR) starts at the rising clock edge T9 (4 clocks from T5).
T9
T10 T11
Ta0 Ta1
Ta2
NOP
NOP
NOP
PRE
NOP
NOP
t ^{Notes 5}
WR
VALID
TIME BREAK
TRANSITIONING DATA
Don't Care
Confidential
73
Rev. 2.0
Aug. /2014