1GB-DDR3L-AS4C64M16D3L Datasheet, PDF (29/90 Pages) Alliance Semiconductor Corporation – JEDEC Standard Compliant

1Gb DDR3L – AS4C64M16D3L
NOTE 20: CKE is allowed to be registered low while operations such as row activation, precharge, autoprecharge or refresh
are in progress, but power-down IDD spec will not be applied until finishing those operations.
NOTE 21: Although CKE is allowed to be registered LOW after a REFRESH command once tREFPDEN(min) is satisfied,
there are cases where additional time such as tXPDLL(min) is also required. See “Power-Down clarifications-Case
2”.
NOTE 22: Defined between end of MPR read burst and MRS which reloads MPR or disables MPR function.
Confidential
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Rev. 2.0
Aug. /2014