MDS212 Datasheet, PDF (94/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch

Bit [25]
Bit [26]
Reserved
RE
Bit [31:27]
Reserved
Type = BMCT (12bits)
MDS212
Data Sheet
Remote Ports Enable: Indicate some members in the remote
device.
0=disable 1=enable
31
CPUIRDAT 0
Bit [11:0]
BM
Bit [12:31]
Reserved
Type = FCB (56 bits)
12 11
0
BM[11:0]
Buffer Management control FIFO Output
BM stores free FCB handles. (FCB handle=0 cannot be used.)
31
CPUIRDAT 0
CPUIRDAT 1
Bit [55:0]
FCB
Type = QCNT (79 bits)
24 23
0
FCB_DATA[31:0]
FCB_DATA[55:32]
Frame Control Block.
Refer to Section 9.0 “The High Density Instruction Set
Computer (HISC)” on page 37 for detailed data structure.
31
CPUIRDAT0
CPUIRDAT1
CPUIRDAT2
26 25
15 14
WrPt[5:0]
ECnt[10:0]
Cache Queue Entry[16:0]
CV
4
Base[11:0]
RdPt[9:0]
Cache Queue Entry[31:17]
3
20
QS[2:0]
WrPt[9:6]
Bit [2:0]
Bit [14:3]
Bit [25:15]
Bit [35:26]
Bit [45:36]
Bit[46]
Bit[78:47]
Que_S [2:0] Queue size000=128 entries 001=128*2 entries
111=128*8=1K entries
Each entry contains 4 bytes
Base [11:0]Base pointer to its Transmission Queue
ECnt [10:0]Entry Count: Total entries in its queue.
WrPt [9:0]Write Pointer
Address_Write_Entry[20:9]=Base[11:0]+WrPt[9:7]
Address_Write_Entry[9:3]= WrPt[6:0]
Address_Write_Entry[2:0]= 0
(The address [2:0] is always equal to 0.)
RdPt [9:0]Read Pointer
Address_Read_Entry[20:9]=Base[11:0]+RdPt[9:7]
Address_Read_Entry[9:3]= RdPt[6:0]
Address_Read_Entry[2:0]= 0 (The address [2:0] is always equal to 0.)
CV Cache Valid
CV=1, Cache of Queue Entry QE[31:0] is valid.
QE[31:0]Cache a queue entry
94
Zarlink Semiconductor Inc.