MDS212 Datasheet, PDF (21/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch

MDS212
Data Sheet
Frame Buffer Interface (continued)
Ball No(s)
Symbol
E7, E11, E16, E20,
G22, L22, T22, Y22,
AB20, AB16, AB11,
AB7, Y5, T5, L5, G5
E5, E13, E22, L11,
L12, L13, L14, L15,
L16, M11, M12, M13,
M14, M15, M16, N11,
N12, N13, N14, N15,
N16, P11, P12, P13,
P14, P15, P16, R11,
R12, R13, R14, R15,
R16, T11, T12, T13,
T14, T15, T16, AB5,
AB14, AB22
C1, C1
VCC
VSS
AVDD[1:0]
A1, A1
AVSS[1:0]
BOOTSTRAP PINS
P23
BS_BMOD
R26
BS_RW
R25
BS_SWM
R24
BS_PSD
R23
BS_RDYOP
I/O
Power
Power
Ground
Analog
Power
Analog
Ground
Input
Input
Input
Input
Input
Note:
# = Active low signal
Input = Input signal
In-ST = Input signal with Schmitt-Trigger
Output = Output signal (Tri-State driver)
Out-OD = Output signal with Open-Drain driver
I/O-TS = Input & Output signal with Tri-State driver
I/O-OD = Input & Output signal with Open-Drain driver
U = Internal weak pull-up
TS = Tri-state
ST = Schmitt trigger
Description
+3.3 Volt DC Supply
Ground
Used for the PLL
Used for the PLL
CPU Bus mode
MUST BE SET TO 0
CPU Read/Write Control Polarity Selection Default=1
0=R/W#;
1=W/R#
Switch mode: Default=1
0=Managed mode 1= Unmanaged
Primary Device Enable Pin Default=1
0=Secondary
1=Primary
Option of merge the P_RDY# and P_BRDY# as one
pin Default=1
0=Merged pin
1=Separated pins
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Zarlink Semiconductor Inc.