MDS212 Datasheet, PDF (75/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch

Bit [15:9]
VMACB
Bit [31:16] Reserved
MDS212
VLAN Mac Table Base, serves as [20:14] bit of address.
This table indicates the association of MAC address and
VLAN.
Data Sheet
18.2.3.6 MBCR - Multicast Buffer Control Register
• Access:
• Address:
Non-Zero-Wait-State, Direct Access,
h79C
Write/Read
31
22 21
20 19
11 10
54
0
MCTH
MAX_CNT_LMT RMC_BUF_RSV MAX_MC_FD
Bit [4:0]
Bit [10:5]
Bit [19:11]
Bit [21:20]
Bit [31:22]
MAX_MC_FD
RMC_BUF_RSV
MAX_CNT_LMT
MCFTH
Reserved
Maximum Number of Multicast Frames allowed for forwarding.
Number of buffers reserved for receiving remote Multicast
Frames.
Maximum Number of Multicast Frames allowed per device
Multicast Forwarding Threshold: Watermark for forwarding FF
to drop regular multicast packet if IPMC bit in DCR2[26] is ON.
CPU can set four level watermarks, which are programmable.
00=25%
10=75%
01=50%
11=100%
18.2.3.7 RAMA - RAM Counter Block Access Register
• Access:
Non-Zero-Wait-State, Direct Access,
Write/Read
• Address:
h7A0
• RAM counter block contains 12 counter blocks (one for each port) Port 0 counter block starts at address 0.)
The size of each block is 16 double words, which holds, in total, 30 statistic counters. The size and type of
each counter is referred to the register ECR4.
• CPU uses this register to access the specified statistic counter by setting the start address of RAM counter
block and the length.
31
16
15 14
11 10
43
0
W/R
ST_ADR
BST_CNT
Bit [3:0]
Bit [10:4]
Bit [14:11]
Bit [15]
Bit [16:31]
BST_CNT
ST_ADR
Reserved
W/R
Reserved
Read/Write burst (length) of RAM Block.
(Unit = 1double words)
Read/Write Start Address.
RAM Block Access Write/Read indicator
1 = Write
0 = Read
Note: The access range is equal to from ST_ADR to END_ADR= S_ADR+ BST_CNT.The END_ADR cannot
cross the boundary of each port block, i.e., 8 double words.
75
Zarlink Semiconductor Inc.