MDS212 Datasheet, PDF (86/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch

MDS212
Data Sheet
Bit [13]
Bit [14]
Bit [15]
Bit [31:16]
XON
_
Thd
=


min.# offreeFCB
8


Queue Aging Enable
Flush Enable
XON Enable
Reserved
TX queue aging function enable
When stack is full, enable flush procession
0 = disable 1 = enable
Full Duplex XON enable
0 = disable 1 = enable
18.2.10.5 AMAR[1:0] - Multicast Address Reg. For MAC Control Frames
• This 6-byte MAC Address is stored in two 32-bit registers
• AMAR0 MAC Address Byte [3:0]
• Address: h674
• AMAR1 MAC Address Byte [5:4]
• Address: h678
• Access:
Non-Zero-Wait-State, Direct Access,
Write/Read
AMAR0
AMAR1
31
MAC 3
24 23
MAC 2
16 15
MAC 1
MAC 5
87
0
MAC 0
MAC 4
18.2.10.6 AMCT - MAC Control Frame Type Code Register
Access:
Address:
Non-Zero-Wait-State, Direct Access, Write/Read
h67C
31
24 23
16 15
8
7
0
Frame Type
• 2-byte MAC Control Frame Type Code defined by IEEE 802.3X Full Duplex Flow Control Standard
18.2.10.7 ADAR [1:0] - Base MAC Address Registers
• The 6-byte MAC Address is stored in two 32-bit registers
• ADAR0
MAC Address Byte [3:0]
• Address:
h600
• ADAR1
MAC Address Byte [5:4]
• Address:
h604
• Access:
Non-Zero-Wait-State, Direct Access,
31
24 23
16 15
ADAR0
MAC 3
MAC 2
ADAR1
MAC 1
MAC5
87
Write/Read
0
MAC 0
MAC 4
• These two registers define the base MAC address of the device.
• Bit [3:0] of Byte 0 (MAC5) is always set to 0.
• MAC address for each port is defined by
86
Zarlink Semiconductor Inc.